Pramod  Govindan

Assistant Professor

Electrical Engineering • College of Computing, Engineering & Construction

Areas of Expertise

• System-on-Chip Architecture and Design

• Analog & Digital Integrated Circuit Design

• Programming languages such as Verilog HDL, VHDL

• Hardware implementation of Cryptography algorithms 

ASIC/FPGA Design Flow

• 3D Data Compression

• Discrete Wavelet Transform 

Education

PhD in Electrical Engineering 
Illinois Institute of Technology, Chicago, USA
May 2015


Masters in “VLSI and Microelectronics”
Illinois Institute of Technology, Chicago, USA
May 2009


Bachelor of Technology in Electronics and Communication
Govt. Engineering College, Thrissur, India
December 1997 

Biography

Dr. Govindan has more than 9 years of industry experience in System-on-Chip design/verification, out of which 7 years were with Analog Devices Inc (ADI).  At ADI, he has been leading System-on-Chip Design and verification efforts for Network media processors and Multimedia over IP applications. He also has 4 years of academic teaching experience in the field of Computer architecture, Electronic circuit design, Embedded systems, VLSI technology, SoC design etc., apart from serving as the Faculty coordinator for student projects at Rajagiri school of engineering & technology, Kochi, India. His current research focuses on hardware implementation of biometric cryptography algorithms.

Awards

• Student Paper Competition Award in IEEE International Ultrasonic Symposium 2013

• Finalist of Student Paper Competition in IEEE International Ultrasonic Symposium 2014
 

Affiliations

Member of IEEE

Publications & Presentations

Peer-Reviewed:-

1. P. Govindan, J. Saniie, “Processing Algorithms for 3D Data Compression of Ultrasonic RF Signals”, IET Signal Processing Journal, vol. 9, no. 3, pp. 267-276, 2015.

2. P. Govindan, V. Vasudevan, T. Gonnot, J. Saniie, “Reconfigurable Ultrasonic Testing System Development Using Programmable Analog Front-End and Reconfigurable System-on-Chip Hardware”, Circuits and Systems, vol. 6, pp. 161-171, 2015.

3. P. Govindan, B. Wang, P. Ravi, J. Saniie, "Hardware and software architectures for computationally efficient three-dimensional ultrasonic data compression", IET Circuits, Devices & Systems, vol. 10, no. 1, pp. 54-61, 2016.
4. S. Gilliland, P. Govindan, J. Saniie, "Architecture of the Reconfigurable Ultrasonic System-On-Chip Hardware Platform", IET Circuits, Devices & Systems, vol. 10, no. 4, pp. 301-308, 2016.
 

Conference:-

1. P. Govindan, S. Gilliland, T. Gonnot, J. Saniie, "Reconfigurable Ultrasonic System-on-Chip Hardware (RUSH) Platform for Real-Time Ultrasonic Imaging Applications", IEEE International Ultrasonics Symposium, pp. 463-466, Oct. 7-10, 2012 

2. P. Govindan, S. Gilliland, A. Kasaeifard, T. Gonnot, J. Saniie, "Performance Analysis of Reconfigurable Ultrasonic System-on-Chip Hardware Platform", IEEE Instrumentation and Measurement Technology Conference, pp. 1550-1553, May 6-9, 2013

3. P. Govindan, S. Gilliland, T. Gonnot, J. Saniie, "HW/SW Co-design for Reconfigurable Ultrasonic System-on-Chip Platform", IEEE International Conference on Electro/Information Technology, pp. 1-4, May 9-11, 2013 

4. P. Govindan, J. Saniie, "Performance evaluation of 3D compression for Ultrasonic nondestructive testing applications", IEEE International Ultrasonics Symposium, pp. 437-440, Jul. 21-25, 2013 

5. S. Gilliland, P. Govindan, T. Gonnot, J. Saniie, "Performance evaluation of reconfigurable FPGA based embedded ARM processor for ultrasonic imaging", IEEE International Ultrasonics Symposium, pp. 519-522, Jul. 21-25, 2013

6. P. Govindan, T. Gonnot, S. Gilliland, J. Saniie, "3D Ultrasonic Signal Compression Algorithms for High Signal Fidelity", IEEE 56th International Midwest Symposium in Circuits and Systems, pp. 1263-1266, Aug. 4-7, 2013

7. V. Vasudevan, P. Govindan, J. Saniie, "Reconfigurable Analog Front-End System for Ultrasonic SoC Hardware", IEEE International Conference on Electro/Information Technology, pp. 356-361, June 2014

8. T. Gonnot, W. Yi, E. Monsef, P. Govindan, J. Saniie, " Sensor Network for Extended Health Monitoring of Hospital Patients ", IEEE EMBS Special Topic Conference on Healthcare Innovation & Point-of-Care Technologies, pp. 236-238, October 2014 

9. P. Govindan, J. Saniie, "Hardware-Software Co-design of 3D Data Compression for Real-time Ultrasonic Imaging Applications", IEEE International Ultrasonics Symposium, pp. 564-567, September 3-6, 2014 

10. V. Vasudevan, P. Govindan, J. Saniie, "Dynamically Reconfigurable Analog Front-End for Ultrasonic Imaging Applications", IEEE International Ultrasonics Symposium, pp. 1924-1927, September 3-6, 2014 

11. B. Wang, P. Govindan, T. Gonnot, J. Saniie, “Acceleration of Ultrasonic Data Compression Using OpenCL on GPU”, IEEE International Conference on Electro/Information Technology, May 2015 (Accepted for publication)

12. V. Vasudevan, B. Wang, P. Govindan, J. Saniie, “Design and Evaluation of Reconfigurable Ultrasonic Testing System”, IEEE International Conference on Electro/Information Technology, May 2015 (Accepted for publication)

13. G. Yang, Z. Zhou, T. Gonnot, J. Saniie, “Design Flow of Motion Based Single Camera 3D Mapping”, IEEE International Conference on Electro/Information Technology, May 2015 (Accepted for publication)

14. P. Govindan, B. Wang, P. Wu, I. Palkov, V. Vasudevan, J. Saniie, “Reconfigurable and Programmable System-on-Chip Hardware Platform for Real-time Ultrasonic Testing Applications”, IEEE International Ultrasonics Symposium, October 21-24, 2015

15. P. Govindan, A. Kasaeifard, J. Saniie, “Ultrasonic Chirplet Echo Parameter Estimation using Time-Frequency Distributions”, IEEE International Ultrasonics Symposium, October 21-24, 2015

16. R. Demirli, P. Govindan, J. Saniie, “Sparse Deconvolution of Ultrasound NDE Echoes Accounting for Pulse Variance”, IEEE International Ultrasonics Symposium, October 21-24, 2015
17. B. Wang, P. Govindan, J. Saniie, " Performance Analysis of System-on-Chip Architectures for Ultrasonic Data Compression", IEEE International Ultrasonics Symposium, Sep. 18-21, 2016 (Accepted for publication) 

18. M. Bourg, P. Govindan, " RSA Based Biometric Encryption System Using FPGA for Increased Security", IEEE International Carnahan Conference on Security Technology (ICCST), Oct. 24-27, 2016 (Accepted for publication)
 

GovindanContact Information

Building 50, Room 3026

(904) 620-5154

pramod.govindan@unf.edu